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Wakeup and Startup of FlexRay
FISITA2008/F2008-05-034

Authors

Reif, Konrad* - University of Cooperative Education Ravensburg, GermanY
Milbredt, Paul - Audi AG, Germany
Horauer, Martin - University of Applied Sciences Vienna, Austria

Abstract

Keywords- Wakeup, startup, FlexRay, communication network, test

With the introduction of FlexRay the first bus system offering a distributed, time-controlled architecture enters the automobile. During operation a global time base is necessary which is created in a distributed mode due to the fault tolerance described. Wakeup and startup phases are used to transfer all bus members running at first in an asynchronous mode into a synchronous operating state to establish a global time base for all of them. The article describes the new challenges of testing methods for these phases and discusses possible solutions.

Before an electronic control unit can send application data to the FlexRay bus, it has to be ready-to-operate ("awake status") and either synchronize the local clock with the existing global time or create a global time together with other cold start nodes. After applying power or after "wakeup" following the sleep mode, the controller has to be configured at first by the application. In the "Ready" state the controller is prepared to start communication according to each application or enabled to wake the bus.

With the described test assembly application Wakeup and Startup can easily be tested. The behaviour of a FlexRay system in the cases described depends very much on the parameters chosen. Thus, a number of startup attempts might increase system availability - especially if several members have rather varying run-up times. It may even happen that one node starts to send startup-frames whereas the others are still booting. These, however, as soon as they are ready, can instantly synchronize onto the first node. So, the first node has used up some of its maximum 31 attempts. However, such a faulty member can block the bus for quite some time (31 attempts multiplied by 6 cycles), and keep clean members from their own startups. The proposed FPGS-board represents a large variety of testing possibilities for synchronous operation, with the chance of controlling the power terminals depending on bus events, and being further developed in this respect.

For the system design it is an advantage to know the booting times of the real ECU's used. If wakeup or startup is initiated with a high likelihood at the same time, then the time needed by the FlexRay-controller for synchronization is longer. Therefore, slightly increasing the run-up time in the application artificially may lower the probability of a collision significantly. This does not delay or elongate the collision-free startup-process, but it does prevent elongation in case of a collision, since the latter will not occur anymore.

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