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Edroom: A Free Tool for the UML2 Component Based Design and Automatic Code Generation of Tiny Embedded Real Time System
ERTS06/2B3_A.Viana_UnivAlcala

Authors

A.V. Sanchez - Computer Engineering Department of the University of Alcala
O.R. Polo - Computer Engineering Department of the University of Alcala
O.L. Gomez - Computer Engineering Department of the University of Alcala
M.K. Revuelta - Computer Engineering Department of the University of Alcala
S.S. Prieto - Computer Engineering Department of the University of Alcala
D.M. Luna - Computer Engineering Department of the University of Alcala

Abstract

Keywords:

Real Time Software Embedded System, Components, Object Oriented Modelling.

Abstract: The use of tiny real time kernels to develop embedded systems is broadly extended. They offer basic services with small overhead footprints in the final product. Usually, these kind of kernels are compliant with the POSIX 1003.13 specification. The use of graphical modelling and automatic code generation tools for developing these kind of small software embedded system if often not considered for several reasons: they are expensive, the learning curve to obtain benefits is often large and finally the generated code usually does not fit well with the platform or exceed the desired size. In this paper we present the adaptation of a free tool, known as EDROOM, to develop this kind of real time software system. EDROOM is inspired on the ROOM modelling language and provides graphical modelling and automatic Embedded C++ code generation. EDROOM is compliant with the new UML2 graphical notation for component based system design and hierarchical behaviour. The new version of EDROOM is a cross development multiplatform generation tool and includes facilities for static control of all resources in order to completely avoid the use of dynamic memory. Our tool has been used in the software development of a small satellite (NANOSAT-01) which is fully functional nowadays. The tool is free distributed in conjunction with a group of code test bench that can be used to validate any port to another architecture.

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